./emulators/spike [RISC-V ISA simulator]
[+] Add this package to your ports tracker

[ CVSweb ] [ Homepage ] [ RSS feed ]

Version: 1.0.0, Package name: spike-1.0.0
Maintained by: Jasper Lievisse Adriaanse
Master sites:
Description
Spike, the RISC-V ISA Simulator, implements a functional model of one or
more RISC-V harts.


Filesize: 376.395 KB
Version History (View Complete History)
  • (2020-11-01) Package added to openports.se, version spike-1.0.0 (created)
[show/hide] View available PLISTS (Can be a lot of data)

CVS Commit History:

   2020-12-01 14:54:58 by Charlene Wendling | Files touched by this commit (2)
Log message:
spike: big endian and base-gcc architectures fixes
- big endian archs: correct a type mismatch in a template function call, that
caused a build failure.
- base-gcc archs: Add a COMPILER line since it requires ports-gcc (C++11).
- powerpc: The simulation generates internal exceptions, mark it BROKEN.
OK kmos@ (who tested on sparc64, thanks!) and jasper@ (maintainer)
   2020-11-05 01:35:16 by Jasper Lievisse Adriaanse | Files touched by this commit (2)
Log message:
compile disasm files with -O1 to half memory usage (to 4GB) when compiling these files
   2020-11-04 07:40:03 by Stuart Henderson | Files touched by this commit (1)
Log message:
disable spike on i386, compiling disasm.cc uses more memory than there is
available address space.